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BiBTeX citation export for MOPOTK045: Generation of High Emittance Ratios in High Charge Electron Beams at FACET-II

@inproceedings{camacho:ipac2022-mopotk045,
  author       = {O. Camacho and A. Halavanau and R. Robles},
  title        = {{Generation of High Emittance Ratios in High Charge Electron Beams at FACET-II}},
  booktitle    = {Proc. IPAC'22},
% booktitle    = {Proc. 13th International Particle Accelerator Conference (IPAC'22)},
  pages        = {560--563},
  eid          = {MOPOTK045},
  language     = {english},
  keywords     = {emittance, quadrupole, experiment, laser, cathode},
  venue        = {Bangkok, Thailand},
  series       = {International Particle Accelerator Conference},
  number       = {13},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {07},
  year         = {2022},
  issn         = {2673-5490},
  isbn         = {978-3-95450-227-1},
  doi          = {10.18429/JACoW-IPAC2022-MOPOTK045},
  url          = {https://jacow.org/ipac2022/papers/mopotk045.pdf},
  abstract     = {{Experiments foreseen at FACET-II, including dielectric plasma wakefield acceleration and linear collider tests, call for electron beams with highly asymmetric transverse emittances - so called "flat beams". A canonical recipe for the generation of such beams is injecting a magnetized beam at a waist into an appropriately tuned skewed quadrupole triplet channel. However, due to the intense non-linear space-charge forces that dominate nC bunches, this method presents difficulties in maintaining the flatness. We proceed with generalized round-to-flat-beam (RTFB) transformation, which takes into account the non-negligible divergence of the beam at the channel entrance, using a quartet of skewed quadrupoles. Our analytical results are further optimized in ELEGANT and GPT simulation programs and applied to the case of the FACET-II beamline. Non-ideal cathode spot distributions obtained from recent FACET-II experiments are used for accurate numerical modeling. Tolerances to quadrupole strengths and alignment errors are also considered, with an eye towards developing hardware specifications.}},
}